Ronak Makwana
What happens when you type a URL and press enter
A millisecond-by-millisecond trace of what happens when you type a URL and press enter: DNS, TCP, TLS, HTTP, and the render path, timed and mapped.
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Web Performance
Trace the milliseconds after you press enter, down to why cache beats RAM.
Web performance articles from Atyantik that start with the machine, not the metric. We trace what happens in the milliseconds after you press enter through DNS, TCP, TLS, and the render path, explain why CPU cache beats RAM down at the SRAM versus DRAM cell, and read Core Web Vitals from field data at p75 before pulling a fix. The Lighthouse post opens up its scoring model so the number stops being a mystery.
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Maulik Macwan
Why is CPU cache faster than RAM? SRAM vs DRAM
Why is CPU cache faster than RAM? The SRAM vs DRAM cell, RAS/CAS/refresh timing, on-die distance, and a benchmark that plots the L1/L2/L3/DRAM knees.
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Ishan Chavda
Core Web Vitals optimization 2026: the field guide
Core Web Vitals optimization 2026 as a diagnosis-first loop: read field data at p75, attribute the failure, pull one fix, and model the revenue it moves.
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Juzer Dhoon
Lighthouse performance score explained: the scoring model
The Lighthouse performance score explained as a weighted sum of five metric sub-scores, plus the throttling model, run-to-run variance, and an LHCI gate.
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